Plasma etching of trenches in silicon has developed considerably for use in higher density integrated circuits. Silicon trenches are used to isolate active devices from each other and in the formation of vertical capacitors. A number of commercially available plasma etchers offer trench etching processes. These plasma etchers vary in their chemistry and in the type of reaction chambers employed. Conventional plasma etchers have resulted in higher throughputs as well as better control over critical etch parameters required in the trench etching process.
There are at least two major problems in conventional trench etching techniques. The first problem is in etching the correct profile at a fast enough rate to be of practical use. There are etch chemistries that are capable of providing a correct profile at a sufficiently fast rate, however, these etch chemistries result in the second problem in conventional trench etching. The second problem is that appropriate etch chemistries typically leave a considerable amount of residue within the plasma process chamber. To maintain proper etching requirements, the etch chamber must be opened and mechanically cleaned and then reconditioned after the cleaning step. This clean up process of the etch chamber leads to a significant increase in chamber downtime and thus a decrease in etching throughput.
Therefore, it is desirable to have a trench etching technique that performs at a sufficiently fast rate and overcomes the buildup of residue within the process chamber as found in conventional trench etching techniques.